Notes/Misc/Linux-PuTTY-Transfering-Files/media/example.png' alt='How To Transfer File Using Putty Serial Port' title='How To Transfer File Using Putty Serial Port' />Using Serial Peripheral Interface SPI with Microchip PIC1. Families Microcontroller. The Serial Peripheral Interface SPI is one of the popular embedded serial communications widely supported by many of todays chip manufacture and it considered as one of the fastest serial data transfer interface for the embedded system. Because of its special inout register configuration, the SPI master device could transfer its data and at the same time it receive a data from the SPI slave device with the clock speed as high as 1. MHz. Beside its superior data transfer speed SPI also use a very simple data transfer protocol compared to the other serial data transfer methods. When the SPI master device want to send the data to the SPI slave device then the SPI master will just simply shifting its own data through a special 8 bits register and at the same time the SPI master will receive the data from the SPI slave into the same register as shown on this following picture With this circular shift register connection between the SPI master and the SPI slave devices, the complete data transfer from both devices will be accomplished in just 8 clock cycles. This means the SPI devices only need about 0. MHz clock. One of the drawbacks using the SPI especially when we use multiple SPI slave device is the SPI slave could not initiate sending its own data to the SPI master device, all the data transfer initiation is always come from the SPI master. The SPI master device has to poll each of the SPI slave devices to know whether the SPI slave device has a data to be sent to the SPI master device or not. Polling the entire SPI slave devices will eventually consumed the SPI master resources when the SPI slave devices to be polled increase, therefore some of the SPI slave device is equipped with the interrupt pin to notify the SPI master device that it has a data to be read. You could read more about how SPI work in my previous posted blog Using Serial Peripheral Interface SPI Master and Slave with Atmel AVR Microcontroller. Learning about serial communication concept and history. Simple to understand examples and experiment for UART, RS232, Ethernet, Wifi, USB, SPI, I2C. Blog Entry Using Serial Peripheral Interface SPI with Microchip PIC18 Families Microcontroller September 12, 2010 by rwb, under Microcontroller. The PIC1. 8F1. 4K2. Microcontroller On this tutorial I will use the Microchip PIC1. F1. 4K2. 2 microcontroller, this microcontroller is one of my favorite 8 bit 2. PIC1. 8 microcontroller families members as it is equipped with sophisticated advanced peripheral inside such as ADC, USART, ECCP Enhanced CaptureComparePWM, SPI, I2. C and the SR Latch 5. Timer module for capacitive sensing. With 1. 6K bytes flash ram and equipped with the build in circuit debug, this 8 bit 2. The PIC1. 8F1. 4K2. SPI peripheral support both master and slave mode but on this tutorial we will only exposing the PIC1. F1. 4K2. 2 SPI master mode where on the first part we will expand the PIC1. F1. 4K2. 2 microcontroller IO by using the SPI IO expansion chip and the second part we will turn the PIC1. F1. 4K2. 2 microcontroller into a very useful SPI device testing tools that could be used to test and debug most of the SPI device chip available today. Both of these projects will give a good understanding and experience of how the PIC1. F1. 4K2. 2 microcontroller SPI master peripheral works. Now lets list down all the necessary hardware and software needed to accomplished these projects Resistors 3. Ohm 8 and 1. 0K 1LEDS 3 mm Blue LED 8 and 3 mm Red LED 1One momentary push button. One Breadboard and some breadboards jumper cables. PICJazz 2. 0 PIN learning board with Microchip PIC1. F1. 4K2. 2 microcontroller from ermicro. Microchip PICKit. Microchip PICKit. Microchip MPLAB IDE version 8. Microchip C1. 8 Compiler version 3. Major Scales Piano Pdf'>12 Major Scales Piano Pdf. Microchip Reference Document PIC1. F1. 4K2. 2 datasheet, MCP2. S1. 7 datasheet, and MCP4. Microchip MCP2. 3S1. SPI IO Expander. The Microchip MCP2. S1. 7 SPI IO expander will give you additional of 1. IO ports where all the 2 x 8 bits general purpose IO ports GPIO could be configure both as output or input. The MCP2. 3S1. 7 IODIRA and IODIRB IO direction register is used to control the IO direction for GPA and GPB respectively. One of the unique features of the Microchip MCP2. S1. 7 SPI IO expander is in its configurable address capabilities. By setting the needed address to its address pins A0, A1, and A2 we could configure up to 1. SPI devices or in other world you could put up to 1. MCP2. 3S1. 7 SPI IO expander in the same SPI bus without having to have the separate CS chip select circuit logic for each of the MCP2. S1. 7 SPI IO expander chip. Each of the MCP2. S1. 7 general IO pins also could be configured to generate interrupt when the ports pin changes its state for more information please refers to Microchip MCP2. S1. 7 datasheet. For the purpose of this tutorial we will use the Microchip MCP2. S1. 7 just as the ordinary input and output expander for the PIC1. F1. 4K2. 2 microcontroller. The MCP2. 3S1. 7 is configured to use address 0x. A0,A1, and A2 are connected to the ground and the push button switch connected to GPB0 port will be use as the toggle button to start and stop the chaser LED display attached to the GPA0 to GPA7 ports. Serif Webplus X6 Download Free there. The following is the C code to achieve these tasks. File Name picspi. Version 1. 0. Description SPI IO Using Microchip MCP2. S1. 7 1. 6 Bit IO Expander. Author RWB. Target PICJazz 2. PIN Board PIC1. 8F1. K2. 2. Compiler Microchip C1. C Compiler. IDE Microchip MPLAB IDE v. Programmer PICKit. Firmware Suite Version 0. Last Updated 1. Aug 2. PIC1. 8F1. 4K2. 2 Configuration Bit. FOSC IRC Internal RC Oscillator. PLLEN OFF PLL is under software control. PCLKEN ON Primary Clock Enable. FCMEN OFF Fail Safe Clock Monitor disabled. PWRTEN OFF Power Up Timer disabled. BOREN OFF Brown out Reset disabled in hardware and software. WDTEN OFF WDT is controlled by SWDTEN bit of the WDTCON register. MCLRE ON MCLR pin enabled, RE3 input pin disabled. LVP OFF Single Supply ICSP disabled. FOSC IRC, PLLEN OFF, PCLKEN ON. FCMEN OFF, BOREN OFF, PWRTEN OFF. WDTEN OFF, MCLRE ON, LVP OFF MCP2. S1. 7 SPI Slave Device. SPISLAVEID 0x. SPISLAVEADDR 0x. A20,A10,A00. define SPISLAVEWRITE 0x. SPISLAVEREAD 0x. MCP2. S1. 7 Registers Definition for BANK0 default. IODIRA 0x. 00. define IODIRB 0x. IOCONA 0x. 0A. define GPPUA 0x. C. define GPPUB 0x. D. define GPIOA 0x. GPIOB 0x. 13static rom unsigned char ledpatern3. Delay in 1 ms approximately for 1. MHz Internal Clock. Delay. 1KTCYx4. SPIWriteunsigned char addr,unsigned char data. Activate the SS SPI Select pin. PORTCbits. RC6 0 Start MCP2. S1. 7 Op. Code transmission. SSPBUF SPISLAVEID SPISLAVEADDR lt lt 1 0x. E SPISLAVEWRITE Wait for Data TransmitReceipt complete. SSPSTATbits. BF Start MCP2. S1. 7 Register Address transmission. SSPBUF addr Wait for Data TransmitReceipt complete. SSPSTATbits. BF. Start Data transmission. SSPBUF data Wait for Data TransmitReceipt complete. SSPSTATbits. BF CS pin is not active. PORTCbits. RC6 1. SPIReadunsigned char addr. Activate the SS SPI Select pin. PORTCbits. RC6 0 Start MCP2. S1. 7 Op. Code transmission. SSPBUF SPISLAVEID SPISLAVEADDR lt lt 1 0x. E SPISLAVEREAD Wait for Data TransmitReceipt complete. SSPSTATbits. BF Start MCP2. S1. 7 Address transmission. SSPBUF addr Wait for Data TransmitReceipt complete.